Partha Tirumalai, Oracle – Chair (through 2017)
Partha is a Senior Principal Engineer and Technical Advisor in the Systems Group of Oracle Corporation. His interests are in processor architecture, optimizing and parallelizing compilers, application performance, and high performance computing systems. He has authored numerous papers and has received a number of patents in these areas. Prior to joining Oracle, he was a Distinguished Engineer at Sun Microsystems, and earlier worked as a Senior Research Scientist at Hewlett-Packard Laboratories. Partha holds a B. Tech degree in Electrical Engineering from I.I.T., Madras, and M.S. and Ph.D. degrees in Computer Science from Northwestern University.
Andy Fritsch, Texas Instruments (through 2018)
Andy is the Manager of Foundational Tools for Texas Instruments. In his role, Andy manages development of tools for TI’s processors across many product areas including DSPs, microcontrollers and automotive. His responsibilities include compilers, hardware debug probes/platforms, simulators, tools product management and applications support. Previously, he was a silicon development program manager with responsibility for architecture, specification, design, test and verification, packaging, qualification and software platforms for TI’s C6000 DSPs. Andy started his career at TI developing real time geophysical applications and RTOS’s. He has also held roles in applications engineering management, partner relationship management and in software and hardware development. Andy has a BS in Applied Mathematics from the University of Tulsa.
Sanjiv Shah, Intel (through 2018)
Sanjiv is the director of the Performance, Analysis and Threading Lab in the software group at Intel. Sanjiv specializes in parallel computing and his lab produces tools and libraries for parallel software, performance and correctness analysis. Sanjiv has been extensively involved with the OpenMP specifications from the beginning and implemented the first Fortran and C/C++ compilers supporting OpenMP (and precursors of OpenMP). He is a former CEO of the OpenMP Architecture Review Board and continues to serve on its Board of Directors.
Josh Simons, VMware, Inc (through 2017)
With over 20 years of experience in High Performance Computing, Josh currently leads an effort to bring the full value of virtualization to HPC. Previously, he was a Distinguished Engineer at Sun Microsystems with broad responsibilities for HPC direction and strategy. He joined Sun in 1996 from Thinking Machines Corporation, a pioneering company in the area of Massively Parallel Processors (MPPs), where he held a variety of technical positions. Josh has worked on developer tools for distributed parallel computing, including language and compiler design, scalable parallel debugger design and development, and MPI. He has also worked in the areas of 3D graphics, image processing, and realtime device control. Josh has an undergraduate degree in Engineering from Harvard College and a Masters in Computer Science from Harvard University. He has served as a member of the Board of Directors since 2002.
Dieter an Mey (through 2016)
Dieter leads the high performance computing team of RWTH Aachen University’s Center for Computing and Communication in Germany. He studied Mathematics and Computer Science in Aachen and by now has a 30+ year track record in HPC with a focus on user support and services. Starting with vectorization and message passing, he and his group are actively participating in the OpenMP community since the first OpenMP specification was released. He is co-author of numerous publications on OpenMP programming and productivity.
Dr. Michael Klemm – CEO
Michael obtained an M.Sc. in Computer Science in 2003 and received a Doctor of Engineering degree (Dr.-Ing.) from the Friedrich-Alexander-University Erlangen-Nuremberg, Germany, in 2008. Michael Klemm works in the Developer Relations Division at Intel in Germany and his areas of interest include compiler construction, design of programming languages, parallel programming, and performance analysis and tuning. Michael Klemm joined the OpenMP organization in 2009.
Ravi S Rao, Intel – CFO
Ravi is the Chief of Staff and Divisional Operations Manager at Intel Corporation. Ravi has a Masters in Electrical and Computer Engineering from the University of Texas at Austin. Ravi also has a Masters in Engineering Management from the University of Texas at Austin. At Intel, Ravi has worked in diverse areas such as Hardware Architecture, Technical Marketing, Product Development, Engineering Operations and Business Operations.
Christian Terboven, RWTH Aachen University – Secretary
Christian Terboven studied computer science at RWTH Aachen University and specialized on High Performance Computing. Since 2006 he is working as a research associate in the High Performance Computing (HPC) group of RWTH’s IT Center. In 04/2016 he became the group manager and the deputy head of the division Computation Science and Engineering (CSE). His research interests center around Parallel Programming – with a focus on Shared-Memory architectures, Paradigms, Programming Languages, and related Software Engineering aspects. He has been involved in the Analysis, Tuning and Parallelization of several large-scale simulation codes for various architectures. Since 2006 he is a member of the OpenMP Language Committee, in which he leads the Affinity subcommittee, and the second representative in the OpenMP Architecture Review Board for RWTH Aachen.
Matthijs van Waveren – Marketing Coordinator
Matthijs has contributed to the development of several SPEC benchmarks and of a number of OpenMP features. He is member of the Board of SPEC, and has received several SPECtacular awards. He holds a PhD from the University of Amsterdam.
Bronis R. de Supinski – Chair of the Language Committee
Bronis R. de Supinski is the principal investigator and leader of the Exascale Computing Technlogies (ExaCT) project and the co-leader of the Advanced Simulation and Computing (ASC) program’s Application Development Environment and Performance Team (ADEPT) at Lawrence Livermore National Laboratory (LLNL). He is also an Adjunct Associate Professor in the Department of Computer Science and Engineering at Texas A&M University. Bronis earned his Ph.D. in Computer Science from the University of Virginia in 1998 and he joined LLNL’s Center for Applied Scientific Computing (CASC) in July 1998. Currently, his projects include scalable debugging methods, investigations into mechanisms and tools to improve memory performance, applications of data mining techniques to tools for large-scale systems, resiliency techniques, a variety of optimization techniques and tools for MPI and several issues with OpenMP, including its memory model and tool support. He pursues the last set of topics as the Chair of the OpenMP Language Committee. Throughout his career, Bronis has won several awards, including the prestigious Gordon Bell Prize in 2005 and 2006.
Richard Friedman – Webmaster
Richard is a freelance technical writer/editor and web designer, and lives in Oakland, CA. For 3 decades he was a Fortran and systems programmer on the IBM 650, IBM 7094, CDC 6600/7600, Cray 1, Cyber 205, before becoming a full-time technical writer at Sun Microsystems, specializing in compilers and high performance computing. Visit his website at rchrd.com.